74ABT16841A
Overview
The 74ABT16841A Bus interface latch is designed to provide extra data width for wider data/address paths of buses carrying parity. The 74ABT16841A consists of two sets of ten D-type latches with 3-State outputs.
- High speed parallel latches
- Live insertion/extraction permitted
- Extra data width for wide address/data paths or buses carrying parity
- Power-up 3-State
- Power-up reset
- Ideal where high speed, light loading, or increased fan-in are required with MOS microprocessors
- Output capability: +64 mA / -32 mA
- Latch-up protection exceeds 500 mA per Jedec Std 17
- ESD protection exceeds 2000 V per MIL STD 883 Method 3015 and 200 V per Machine Model
