74ABT16899 Datasheet - NXP

18-bit latched transceiver

74ABT16899 Features

* Symmetrical (A and B bus functions are identical)

* Selectable generate parity or ”feed-through” parity for A-to-B and B-to-A directions Parity error checking of the A and B bus latches is continuously provided with ERRA and ERRB, even with both buses in 3-State. The 74ABT/H16899

74ABT16899 General Description

The 74ABT/H16899 has three principal modes of operation which are outlined below. All modes apply to both the A-to-B and B-to-A directions. Transparent latch, Generate parity, Check A and B bus parity: Bus A (B) communicates to Bus B (A), parity is generated and passed on to the B (A) Bus as BPAR (A.

74ABT16899 Datasheet (105.46 KB)

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Datasheet Details

Part number:

74ABT16899

Manufacturer:

NXP ↗

File Size:

105.46 KB

Description:

18-bit latched transceiver.
INTEGRATED CIRCUITS 74ABT16899 74ABTH16899 18-bit latched transceiver with 16-bit parity generator/checker (3-State) Product specification Supersedes.

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74ABT16899 18-bit latched transceiver NXP

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74ABT16899 Features

74ABT16899 General Description

Datasheet Details

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Description:

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