74ALVC74 Datasheet - NXP

Dual D-type flip-flop

74ALVC74 Features

* Wide supply voltage range from 1.65 to 3.6 V

* Complies with JEDEC standard: JESD8-7 (1.65 to 1.95 V) JESD8-5 (2.3 to 2.7 V) JESD8B/JESD36 (2.7 to 3.6 V).

* 3.6 V tolerant inputs/outputs

* CMOS low power consumption

* Direct interface with TTL levels (2.7 to

74ALVC74 General Description

74ALVC74 The 74ALVC74 is a dual positive-edge triggered, D-type flip-flop with individual data (D), clock (CP), set (SD) and reset (RD) inputs and complementary Q and Q outputs. The set and reset are asynchronous active LOW inputs and operate independently of the clock input. Information on the da.

74ALVC74 Datasheet (103.40 KB)

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Datasheet Details

Part number:

74ALVC74

Manufacturer:

NXP ↗

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103.40 KB

Description:

Dual d-type flip-flop.
INTEGRATED CIRCUITS DATA SHEET 74ALVC74 Dual D-type flip-flop with set and reset; positive-edge trigger Product speciﬁcation Supersedes data of 2003.

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74ALVC74 Dual D-type flip-flop NXP

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74ALVC74 Features

74ALVC74 General Description

Datasheet Details

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