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nexperia

74ALVC74BQ Datasheet Preview

74ALVC74BQ Datasheet

Dual D-type flip-flop

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74ALVC74
Dual D-type flip-flop with set and reset; positive-edge trigger
Rev. 4 — 16 August 2017
Product data sheet
1 General description
The 74ALVC74 is a dual positive edge triggered, D-type flip-flop. It has individual data
(nD) inputs, clock (nCP) inputs, set (nSD) and (nRD) inputs, and complementary nQ and
nQ outputs.
The set and reset are asynchronous active LOW inputs that operate independently
of the clock input. Information on the data input is transferred to the nQ output on the
LOW-to-HIGH transition of the clock pulse. The nD inputs must be stable one set-up
time prior to the LOW-to-HIGH clock transition, for predictable operation. Schmitt-trigger
action in the clock input makes the circuit highly tolerant to slower clock rise and fall
times.
2 Features and benefits
Wide supply voltage range from 1.65 V to 3.6 V
Complies with JEDEC standard:
JESD8-7 (1.65 to 1.95 V)
JESD8-5 (2.3 to 2.7 V)
JESD8B/JESD36 (2.7 to 3.6 V)
3.6 V tolerant inputs/outputs
CMOS low power consumption
Direct interface with TTL levels (2.7 V to 3.6 V)
Power-down mode
Latch-up performance exceeds 250 mA
ESD protection:
HBM JESD22-A114-A exceeds 2000 V
MM JESD22-A115-A exceeds 200 V
Specified from -40 °C to +85 °C




nexperia

74ALVC74BQ Datasheet Preview

74ALVC74BQ Datasheet

Dual D-type flip-flop

No Preview Available !

Nexperia
74ALVC74
Dual D-type flip-flop with set and reset; positive-edge trigger
3 Ordering information
Table 1. Ordering information
Type number Package
Temperature range
74ALVC74D
-40 °C to +85 °C
74ALVC74PW -40 °C to +85 °C
74ALVC74BQ -40 °C to +85 °C
Name
SO14
TSSOP14
DHVQFN14
Description
plastic small outline package; 14 leads;
body width 3.9 mm
plastic thin shrink small outline package;
14 leads; body width 4.4 mm
plastic dual in-line compatible thermal
enhanced very thin quad flat package; no leads;
14 terminals; body 2.5 x 3 x 0.85 mm
Version
SOT108-1
SOT402-1
SOT762-1
4 Functional diagram
4 10
1SD 2SD
2
12
1D
2D
D
SD
Q
1Q
2Q
5
9
3 1CP CP
FF
11 2CP
Q 1Q 6
RD
2Q 8
1RD 2RD
1 13
aaa-008836
Figure 1. Logic symbol
4
S
3
C1
2
1D
1
R
10
S
11
C2
12
2D
13
R
Figure 2. IEC logic symbol
5
6
9
8
aaa-008837
74ALVC74
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 4 — 16 August 2017
© Nexperia B.V. 2017. All rights reserved.
2 / 18


Part Number 74ALVC74BQ
Description Dual D-type flip-flop
Maker nexperia
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