74AUP1G57 - Low Power Configurable Multiple Function Gate

Datasheet Summary

Description

The 74AUP1G57 provides configurable multiple functions.

The output state is determined by eight patterns of 3-bit input.

The user can choose the logic functions AND, OR, NAND, NOR, XNOR, inverter, and buffer.

NXP

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Datasheet Details

Part number	74AUP1G57
Manufacturer	NXP
File Size	200.28 KB
Description	Low Power Configurable Multiple Function Gate
Datasheet	74AUP1G57 Datasheet
Additional preview pages of the 74AUP1G57 datasheet.

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Full PDF Text Transcription

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74AUP1G57 Low-power configurable multiple function gate Rev. 7 — 16 September 2015 Product data sheet 1. General description The 74AUP1G57 provides configurable multiple functions. The output state is determined by eight patterns of 3-bit input. The user can choose the logic functions AND, OR, NAND, NOR, XNOR, inverter, and buffer. All inputs can be connected to VCC or GND. This device ensures a very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V. This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down.

Published: Mar 2, 2007 |