HEF4020B Overview
Description
The HEF4020B is a 14-stage binary ripple counter with a clock input (CP), an overriding asynchronous master reset input (MR) and twelve fully buffered outputs (O0, O3 to O13). The counter advances on the HIGH to LOW transition of CP.
Key Features
- of the HEF4020B is: high speed (typ
- 35 MHz at VDD = 15 V)
- HEF4020B MSI Fig.1 Functional diagram
