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LPC2102 - Single-chip 16-bit/32-bit microcontrollers

Download the LPC2102 datasheet PDF. This datasheet also covers the LPC2101 variant, as both devices belong to the same single-chip 16-bit/32-bit microcontrollers family and are provided as variant models within a single manufacturer datasheet.

General Description

The LPC2101/02/03 microcontrollers are based on a 16-bit/32-bit ARM7TDMI-S CPU with real-time emulation that combines the microcontroller with 8 kB, 16 kB or 32 kB of embedded high-speed flash memory.

Key Features

  • through output match on all timers, and 32 fast GPIO lines with up to nine edge or level sensitive external interrupt pins make these microcontrollers particularly suitable for industrial control and medical systems. 2. Features 2.1 Enhanced features Enhanced features are available in parts LPC2101/02/03 labelled Revision A and higher: I Deep power-down mode with option to retain SRAM memory and/or RTC. I Three levels of flash Code Read Protection (CRP) implemented. 2.2 Key features I 16-bit/32-b.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (LPC2101-NXP.pdf) that lists specifications for multiple related part numbers.

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
LPC2101/02/03 Single-chip 16-bit/32-bit microcontrollers; 8 kB/16 kB/32 kB flash with ISP/IAP, fast ports and 10-bit ADC Rev. 04 — 2 June 2009 Product data sheet 1. General description The LPC2101/02/03 microcontrollers are based on a 16-bit/32-bit ARM7TDMI-S CPU with real-time emulation that combines the microcontroller with 8 kB, 16 kB or 32 kB of embedded high-speed flash memory. A 128-bit wide memory interface and a unique accelerator architecture enable 32-bit code execution at the maximum clock rate. For critical performance in interrupt service routines and DSP algorithms, this increases performance up to 30 % over Thumb mode. For critical code size applications, the alternative 16-bit Thumb mode reduces code by more than 30 % with minimal performance penalty.