54ACT112
Description
The ’ACT112 contains two independent, high-speed JK flip-flops with Direct Set and Clear inputs. Synchronous state changes are initiated by the falling edge of the clock.
Key Features
- ’ACT112 has TTL-compatible inputs
- Outputs source/sink 24 mA
- Standard Microcircuit Drawing (SMD) 5962-8995001 Connection Diagram Pin Assigment for DIP and Flatpack Pin Descriptions Pin Names J1, J2, K1, K2 CP1, CP2 CD1, CD2 SD1, SD2 Q1, Q2, Q1, Q2 Data Inputs Clock Pulse Inputs (Active Falling Edge) Direct Clear Inputs (Active LOW) Direct Set Inputs (Active LOW) Outputs Description
