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National Semiconductor Electronic Components Datasheet

54ACT374 Datasheet

Octal D Flip-Flop

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August 1998
54AC374 54ACT374
Octal D Flip-Flop with TRI-STATE® Outputs
General Description
The ’AC/’ACT374 is a high-speed, low-power octal D-type
flip-flop featuring separate D-type inputs for each flip-flop
and TRI-STATE outputs for bus-oriented applications. A buff-
ered Clock (CP) and Output Enable (OE) are common to all
flip-flops.
Features
n ICC and IOZ reduced by 50%
n Buffered positive edge-triggered clock
n TRI-STATE outputs for bus-oriented applications
n Outputs source/sink 24 mA
n See ’273 for reset version
n See ’377 for clock enable version
n See ’373 for transparent latch version
n See ’574 for broadside pinout version
n See ’564 for broadside pinout version with inverted
outputs
n ’ACT374 has TTL-compatible inputs
n Standard Military Drawing (SMD)
— ’AC374: 5962-87694
— ’ACT374: 5962-87631
Logic Symbols
IEEE/IEC
DS100289-1
Pin
Names
D0– D7
CP
OE
O0– O7
Description
Data Inputs
Clock Pulse Input
TRI-STATE Output Enable Input
TRI-STATE Outputs
DS100289-2
TRI-STATE® is a registered trademark of National Semiconductor Corporation.
FACT® is a registered trademark of Fairchild Semiconductor Corporation.
© 1998 National Semiconductor Corporation DS100289
www.national.com


National Semiconductor Electronic Components Datasheet

54ACT374 Datasheet

Octal D Flip-Flop

No Preview Available !

Connection Diagrams
Pin Assignment for DIP
and Flatpak
Pin Assignment for LCC
DS100289-3
Functional Description
The ’AC/’ACT374 consists of eight edge-triggered flip-flops
with individual D-type inputs and TRI-STATE true outputs.
The buffered clock and buffered Output Enable are common
to all flip-flops. The eight flip-flops will store the state of their
individual D inputs that meet the setup and hold time require-
ments on the LOW-to-HIGH Clock (CP) transition. With the
Output Enable (OE) LOW, the contents of the eight flip-flops
are available at the outputs. When the OE is HIGH, the out-
puts go to the high impedance state. Operation of the OE in-
put does not affect the state of the flip-flops.
Logic Diagram
Truth Table
Inputs
Dn CP
HN
LN
XX
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
Z = High Impedance
N = LOW-to-HIGH Transition
DS100289-4
Outputs
OE On
LH
LL
HZ
DS100289-5
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
www.national.com
2


Part Number 54ACT374
Description Octal D Flip-Flop
Maker National Semiconductor
Total Page 8 Pages
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