Unit Loading Fan Out
Pin Names
Description
I0 – I7
S0 – S2
E
Z
Z
Data Inputs
Select Inputs
Enable Input (Active LOW)
Data Output
Inverted Data Output
54F 74F
UL
HIGH LOW
10 10
10 10
10 10
50 33 3
50 33 3
Input IIH IIL
Output IOH IOL
20 mA b0 6 mA
20 mA b0 6 mA
20 mA b0 6 mA
b1 mA 20 mA
b1 mA 20 mA
Functional Description
Truth Table
The ’F151A is a logic implementation of a single pole 8-po-
sition switch with the switch position controlled by the state
of three Select inputs S0 S1 S2 Both assertion and nega-
tion outputs are provided The Enable input (E) is active
LOW When it is not activated the negation output is HIGH
and the assertion output is LOW regardless of all other in-
puts The logic function provided at the output is
Z e E (I0 S2 S1 S0 a I1 S2 S1 S0 a I2 S2 S1 S0 a
I3 S2 S1 S0 a I4 S2 S1 S0 a I5 S2 S1 S0 a
I6 S2 S1 S0 a I7 S2 S1 S0)
The ’F151A provides the ability in one package to select
from eight sources of data or control information By proper
manipulation of the inputs the ’F151A can provide any logic
function of four variables and its negation
Inputs
Outputs
E S2 S1 S0 Z Z
H X X X HL
L L L L I0 I0
L L L H I1 I1
L L H L I2 I2
L L H H I3 I3
L H L L I4 I4
L H L H I5 I5
L H H L I6 I6
L H H H I7 I7
H e HIGH Voltage Level
L e LOW Voltage Level
X e Immaterial
Logic Diagram
TL F 9481 – 4
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays
2
