Description
The DP8417 8418 8419 8419X represent a family of 256k DRAM Controller Drivers which are designed to provide ‘‘No-Waitstate’’ CPU interface to Dynamic RAM arrays of up to 2 Mbytes and larger Each device offers slight functional variations of the DP8419 design which are tailored for different system requirements All family members are fabricated using National’s new oxide isolated Advanced Low power Schottky (ALS) process and use design techniques which enable them to significantly out-perform all
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Makes DRAM Interface and refresh tasks appear virtually transparent to the CPU making DRAMs as easy to use as static RAMs Specifically designed to eliminate CPU wait states up to 10 MHz or beyond Eliminates 15 to 20 SSI MSI components for significant board real estate reduction system power savings and the elimination of chip-to-chip AC skewing On-board ultra precise delay line On-board high capacitive RAS CAS WE and address drivers (specified driving 88 DRAMs directly.