MM74HC51 Datasheet | National Semiconductor

MM54HC51 MM74HC51 Dual AND-OR-Invert Gate MM54HC58 MM74HC58 Dual AND-OR Gate January 1988 MM54HC51 MM74HC51 Dual AND-OR-Invert Gate MM54HC58 MM74HC58 Dual AND-OR Gate General Description These gates utilize advanced silicon-gate CMOS technology to achieve operating speeds similar to LS-TTL gates with the low power consumption of standard CMOS integrated circuits All gates have buffered outputs providing high noise immunity and the ability to drive 10 LS-TTL loads The 54HC 74HC logic family is functionally as well as pin-out patible with the standard 54LS 74LS logic family All inputs are protected from damage due to static discharge by internal diode clamps to VCC and ground Features Y Typical propagation delay 10 ns Y Wide power supply range 2 - 6V Y Low quiescent supply current 20 m A maximum (74 Series) Y Low input current 1 m A maximum Y High output current 4 m A minimum Connection Diagrams Dual-In-Line Package Top View Order Number MM54HC51 or MM74HC51 Dual-In-Line...