Full PDF Text Transcription for 74LS74 (Reference)
Note: Below is a high-fidelity text extraction (approx. 800 characters) for
74LS74. For precise diagrams, and layout, please refer to the original PDF.
SN74LS74A Dual D-Type Positive Edge-Triggered Flip-Flop The SN74LS74A dual edge-triggered flip-flop utilizes Schottky TTL circuitry to produce high speed D-type flip-flop...
View more extracted text
utilizes Schottky TTL circuitry to produce high speed D-type flip-flops. Each flip-flop has individual clear and set inputs, and also complementary Q and Q outputs. Information at input D is transferred to the Q output on the positive-going edge of the clock pulse. Clock triggering occurs at a voltage level of the clock pulse and is not directly related to the transition time of the positive-going pulse. When the clock input is at either the HIGH or the LOW level, the D input signal has no effect. http://onsemi.
74LS74 Datasheet
