74LS74 Datasheet and Specifications PDF

The 74LS74 is a Dual D-type Positive Edge-triggered Flip-Flops.

Key Specifications

PackageDIP
Mount TypeEdge
Operating Voltage5 V
Max Voltage (typical range)5.25 V
Min Voltage (typical range)4.75 V
Clock Edge TriggerPositive Edge
Length19.05 mm
Width7.62 mm
Datasheet4U Logo
Part Number74LS74 Datasheet
ManufacturerHitachi Semiconductor
Overview Unit: mm 19.20 20.32 Max 14 8 6.30 7.40 Max 1 2.39 Max 1.30 7 7.62 0.51 Min 2.54 Min 5.06 Max 2.54 ± 0.25 0.48 ± 0.10 0.25 – 0.05 0° – 15° + 0.10 Hitachi Code JEDEC EIAJ Weight (reference val. rty rights for information contained in this document. Hitachi bears no responsibility for problems that may arise with third party’s rights, including intellectual property rights, in connection with use of the information contained in this document. 2. Products and product specifications may be su.
Part Number74LS74 Datasheet
DescriptionDual D-Type Positive-Edge-Triggered Flip-Flop
ManufacturerTexas Instruments
Overview SN5474, SN54LS74A, SN54S74 SN7474. SN74LS74A, SN74S74 DUAL DĆTYPE POSITIVEĆEDGEĆTRIGGERED FLIPĆFLOPS WITH PRESET AND CLEAR SDLS119 − DECEMBER 1983 − REVISED MARCH 1988 PRODUCTION DATA information is . OSITIVEĆEDGEĆTRIGGERED FLIPĆFLOPS WITH PRESET AND CLEAR SDLS119
* DECEMBER 1983
* REVISED MARCH 1988 4
* POST OFFICE BOX 655303 DALLAS, TEXAS 75265 SN5474, SN54LS74A, SN54S74 SN7474. SN74LS74A, SN74S74 DUAL DĆTYPE POSITIVEĆEDGEĆTRIGGERED FLIPĆFLOPS WITH PRESET AND CLEAR SDLS119
* DECEMBER 1983
* .
Part Number74LS74 Datasheet
DescriptionLOW-POWER SCHOTTKY
Manufactureronsemi
Overview SN74LS74A Dual D-Type Positive Edge-Triggered Flip-Flop The SN74LS74A dual edge-triggered flip-flop utilizes Schottky TTL circuitry to produce high speed D-type flip-flops. Each flip-flop has individu. levels at the set and clear are near VIL maximum then we cannot guarantee to meet the minimum level for VOH. 14 1 H, h = HIGH Voltage Level L, I = LOW Voltage Level X = Don’t Care l, h (q) = Lower case letters indicate the state of the referenced input i, h (q) = (or output) one set-up time prior t.

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