Part number:
NB3L8533
Manufacturer:
File Size:
151.17 KB
Description:
2.5v/3.3v differential 2:1 mux to 4 lvpecl fanout buffer.
* a multiplexed input which can be driven by either a differential or single
* ended input to allow for the distribution of a lower speed clock along with the high speed system clock. The CLK_SEL pin will select the differential clock inputs, CLK and CLK, when LOW (or left open and pulled LOW by
NB3L8533 Datasheet (151.17 KB)
NB3L8533
151.17 KB
2.5v/3.3v differential 2:1 mux to 4 lvpecl fanout buffer.
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