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NB3L83948C Datasheet

2.5V / 3.3V Differential and LVTTL/LVCMOS 2:1 MUX to 1:12 LVCMOS Fanout

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NB3L83948C
2.5 V / 3.3 V Differential and
LVTTL/LVCMOS 2:1 MUX to
1:12 LVCMOS Fanout
Description
The NB3L83948C is a pure 2.5 V / 3.3 V (VDD = VDDO) or mixed
mode 3.3 V Core (VDD) / 2.5 V Output (VDDO) clock distribution
buffer with the capability to select either a differential LVPECL /
LVDS / LVHSTL / SSTL / HCSL or single ended LVCMOS / LVTTL
compatible input clock, such as a Primary or a Test Clock. All other
control inputs (CLK_SEL, CLK_EN, and OE) are LVTTL/LVCMOS
level compatible.
The NB3L83948C provides an enable input, CLK_EN pin, which
synchronously enables or disables the clock outputs while in the LOW
state. Since this input is internally synchronized to the input clock,
changing only when the input is LOW, potential output glitching or
runt pulse generation is eliminated.
The 12 LVCMOS output pins drive 50 W series or parallel
terminated transmission lines. The outputs can also be disabled to a
high impedance (tri−stated) via the OE input, or enabled when High.
Fit, Form, and Function compatible with ICS83948I−147,
ICS83948I−01, CY29948AXI, and MPC9448/9448L
Features
2.5 V / 3.3V (VDD = VDDO) or
3.3 V VDD / 2.5 V VDDO Operation:
2.5 $5%, 2.375 to 2.625 V
3.3 $5%; 3.135 to 3.465 V
350 MHz Clock Support
Accepts LVPECL, LVDS, LVHSTL, SSTL, HCSL, or LVCMOS
Clock Inputs
LVCMOS Compatible Control Inputs
12 LVCMOS Clock Outputs
Synchronous Clock Select
Output Enable to High Z State Control
100 ps Max. Skew Between Outputs
Industrial Temp. Range −40°C to +85°C
32−pin LQFP Package
These are Pb−Free Devices
http://onsemi.com
MARKING
DIAGRAMS*
LQFP−32
FA SUFFIX
CASE 873A
NB3L
83948C
AWLYYWWG
A = Assembly Location
WL = Wafer Lot
YY = Year
WW = Work Week
G = Pb−Free Package
(*Note: Microdot may be in either location)
*For additional marking information, refer to
Application Note AND8002/D.
VDDO
VDD
GND
Q0
Q1
CLK_EN
LVCMOS_CLK
CLK
CLK
CLK_SEL
D
Q
1
2
Q2
Q3
Q4
Q5
Q6
VDDO
Q7
Q8
Q9
Q10
Q11
OE
Figure 1. Simplified Logic Diagram
ORDERING INFORMATION
See detailed ordering and shipping information on page 6 of
this data sheet.
© Semiconductor Components Industries, LLC, 2014
November, 2014 − Rev. 2
1
Publication Order Number:
NB3L83948C/D


  ON Semiconductor Electronic Components Datasheet  

NB3L83948C Datasheet

2.5V / 3.3V Differential and LVTTL/LVCMOS 2:1 MUX to 1:12 LVCMOS Fanout

No Preview Available !

NB3L83948C
CLK_SEL
LVCMOS_CLK
CLK
CLK
CLK_EN
OE
VDD
GND
GND
Q4
VDDO
Q5
GND
Q6
VDDO
Q7
Figure 2. Pinout Configuration (Top View)
Table 1. PIN DESCRIPTION
Pin Name
1 CLK_SEL
2 LVCMOS_CLK
3 CLK
4 CLK
5 CLK_EN
6 OE
7 VDD
8, 12, 16, 20,
24, 28, 32
9, 11, 13, 15,
17, 19, 21,
23, 25, 27,
29, 31
10, 14, 18,
22, 26, 30
GND
Q[11:0]
VDDO
I/O
LVTTL/LVCMOS Input
LVTTL/LVCMOS Input
LVPECL, LVDS,
LVHSTL, SSTL,
HCSL, or LVCMOS
LVPECL, LVDS,
LVHSTL, SSTL,
HCSL, or LVCMOS
LVTTL/LVCMOS Input
LVTTL/LVCMOS Input
POWER
GND
LVCMOS Output
POWER
Open
Default
Pullup
Pullup
Pullup
Pulldown
Pullup
Pullup
Description
Clock Select Input. When LOW, the CLK/CLK differential
inputs are selected. When HIGH, LVCMOS_CLK is selec-
ted.
Single ended Test Clock Input
True Clock Input (internal)
Invert Clock Input
Synchronous Clock Enable Input. When HIGH, outputs are
enabled. When LOW, outputs are disabled (LOW).
Output High Z State control. When HIGH, the outputs are
active and enabled. When LOW, the outputs are high im-
pedance disabled.
VDD Positive Supply pin for core logic. All VDD, VDDO, and
GND pins must be externally connected to a power supply
to guarantee proper operation. Bypass with 0.01 mF cap to
GND.
GND Supply Ground. All VDD, VDDO and GND pins must
be externally connected to power supply to guarantee
proper operation.
Clock Output Pins
VDDO Positive Supply pins. All VDD, VDDO, and GND pins
must be externally connected to a power supply to guaran-
tee proper operation. Bypass each supply pin with 0.01 mF
to GND.
http://onsemi.com
2


Part Number NB3L83948C
Description 2.5V / 3.3V Differential and LVTTL/LVCMOS 2:1 MUX to 1:12 LVCMOS Fanout
Maker ON Semiconductor
Total Page 7 Pages
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