NB4L16M driver/receiver/buffer/translator equivalent, 2.5v/3.3v, 5 gb/s multi level clock/data input to cml driver/receiver/buffer/translator.
provide transmission line termination on chip, at the receiver and driver end, eliminating any use of additional external components.
The VBB, an internally generated vol.
(see Table 6 and Figures 20, 21 22, and 23).
Differential inputs incorporate internal 50 W termination resistors and acc.
The NB4L16M is a differential driver/receiver/buffer/translator
which can accept LVPECL, LVDS, CML, HSTL, LVCMOS/LVTTL and produce 400 mV CML output. The device is capable of receiving, buffering, and translating a clock or data signal that is as sma.
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