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P4C187L - ULTRA HIGH SPEED 64K x 1 STATIC CMOS RAMS

Download the P4C187L datasheet PDF. This datasheet also covers the P4C187 variant, as both devices belong to the same ultra high speed 64k x 1 static cmos rams family and are provided as variant models within a single manufacturer datasheet.

General Description

The P4C187/P4C187Lare 65, 536-bit ultra high speed static RAMs organized as 64K x 1.

The CMOS memories require no clocks or refreshing and have equal access and cycle times.

The RAMs operate from a single 5V ± 10% tolerance power supply.

Key Features

  • Full CMOS, 6T Cell High Speed (Equal Access and Cycle Times).
  • 10/12/15/20/25/35/45 ns (Commercial).
  • 12/15/20/25/35 /45 ns (Industrial).
  • 15/20/25/35/45/55/70/85 ns (Military) Low Power Operation Single 5V±10% Power Supply Data Retention with 2.0V Supply (P4C187L) Separate Data I/O P4C187/P4C187L ULTRA HIGH SPEED 64K x 1 STATIC CMOS RAMS Three-State Output TTL Compatible Output Fully TTL Compatible Inputs Standard Pinout (JEDEC Approved).

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (P4C187-PYRAMID.pdf) that lists specifications for multiple related part numbers.

Datasheet Details

Part number P4C187L
Manufacturer PYRAMID
File Size 796.76 KB
Description ULTRA HIGH SPEED 64K x 1 STATIC CMOS RAMS
Datasheet download datasheet P4C187L Datasheet

Full PDF Text Transcription for P4C187L (Reference)

Note: Below is a high-fidelity text extraction (approx. 800 characters) for P4C187L. For precise diagrams, and layout, please refer to the original PDF.

FEATURES Full CMOS, 6T Cell High Speed (Equal Access and Cycle Times) – 10/12/15/20/25/35/45 ns (Commercial) – 12/15/20/25/35 /45 ns (Industrial) – 15/20/25/35/45/55/70/8...

View more extracted text
mercial) – 12/15/20/25/35 /45 ns (Industrial) – 15/20/25/35/45/55/70/85 ns (Military) Low Power Operation Single 5V±10% Power Supply Data Retention with 2.0V Supply (P4C187L) Separate Data I/O P4C187/P4C187L ULTRA HIGH SPEED 64K x 1 STATIC CMOS RAMS Three-State Output TTL Compatible Output Fully TTL Compatible Inputs Standard Pinout (JEDEC Approved) – 22-Pin 300 mil DIP – 24-Pin 300 mil SOJ – 22-Pin 290x490 mil LCC – 28-Pin 350x550 mil LCC DESCRIPTION The P4C187/P4C187Lare 65, 536-bit ultra high speed static RAMs organized as 64K x 1. The CMOS memories require no clocks or refreshing and have equal access and cycle times.

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