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P4C422 - HIGH SPEED 256 x 4 STATIC CMOS RAM

General Description

The P4C422 is a 1,024-bit high-speed (10ns) Static RAM with a 256 x 4 organization.

The memory requires no clocks or refreshing and has equal access and cycle times.

Inputs and outputs are fully TTL compatible.

Key Features

  • High Speed (Equal Access and Cycle Times).
  • 10/12/15/20/25/35 ns (Commercial).
  • 15/20/25/35 ns (Military) CMOS for Low Power.
  • 495 mW Max.
  • 10/12/15/20/25 (Commercial).
  • 495 mW Max.
  • 15/20/25/35 (Military) Single 5V±10% Power Supply Separate I/O P4C422 HIGH SPEED 256 X 4 STATIC CMOS RAM Fully TTL Compatible Inputs and Outputs Resistant to single event upset and latchup resulting from advanced process and design improvements.

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Datasheet Details

Part number P4C422
Manufacturer PYRAMID
File Size 714.86 KB
Description HIGH SPEED 256 x 4 STATIC CMOS RAM
Datasheet download datasheet P4C422 Datasheet

Full PDF Text Transcription for P4C422 (Reference)

Note: Below is a high-fidelity text extraction (approx. 800 characters) for P4C422. For precise diagrams, and layout, please refer to the original PDF.

FEATURES High Speed (Equal Access and Cycle Times) – 10/12/15/20/25/35 ns (Commercial) – 15/20/25/35 ns (Military) CMOS for Low Power – 495 mW Max. – 10/12/15/20/25 (Comm...

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ns (Military) CMOS for Low Power – 495 mW Max. – 10/12/15/20/25 (Commercial) – 495 mW Max. – 15/20/25/35 (Military) Single 5V±10% Power Supply Separate I/O P4C422 HIGH SPEED 256 X 4 STATIC CMOS RAM Fully TTL Compatible Inputs and Outputs Resistant to single event upset and latchup resulting from advanced process and design improvements. Standard Pinout (JEDEC Approved) – 22-Pin 400 mil DIP – 24-Pin 300 mil SOIC – 24-Pin Square LCC – 24-Pin CERPACK DESCRIPTION The P4C422 is a 1,024-bit high-speed (10ns) Static RAM with a 256 x 4 organization. The memory requires no clocks or refreshing and has equal access and cycle times.

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