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PACE1757ME - COMPLETE EMBEDDED CPU SUBSYSTEM

Download the PACE1757ME datasheet PDF. This datasheet also covers the PACE1757M variant, as both devices belong to the same complete embedded cpu subsystem family and are provided as variant models within a single manufacturer datasheet.

Key Features

  • Implements complete MIL-STD-1750A ISA including optional MMU, MFSR, and BPU functions. Two throughput options: P1757M 2.5MIPS USAF Dais Mix (Inc. Flt. Pt. )@40 MHz P1757ME 3.6MIPS USAF Dais Mix (Inc. Flt. Pt. )@40 MHz All MIL-STD-1750A data formats and address types implemented. P1757ME includes additional matrix and vector instructions to enhance throughput in navigation, DSP transcendental and other complex alorithms. Error detection and correction and parity bit provided. Separate high drive extern.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (PACE1757M-PYRAMID.pdf) that lists specifications for multiple related part numbers.

Datasheet Details

Part number PACE1757ME
Manufacturer PYRAMID
File Size 647.55 KB
Description COMPLETE EMBEDDED CPU SUBSYSTEM
Datasheet download datasheet PACE1757ME Datasheet

Full PDF Text Transcription for PACE1757ME (Reference)

Note: Below is a high-fidelity text extraction (approx. 800 characters) for PACE1757ME. For precise diagrams, and layout, please refer to the original PDF.

PACE1757M/ME COMPLETE EMBEDDED CPU SUBSYSTEM FEATURES Implements complete MIL-STD-1750A ISA including optional MMU, MFSR, and BPU functions. Two throughput options: P1757...

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g optional MMU, MFSR, and BPU functions. Two throughput options: P1757M 2.5MIPS USAF Dais Mix (Inc.Flt.Pt.)@40 MHz P1757ME 3.6MIPS USAF Dais Mix (Inc.Flt.Pt.)@40 MHz All MIL-STD-1750A data formats and address types implemented. P1757ME includes additional matrix and vector instructions to enhance throughput in navigation, DSP transcendental and other complex alorithms. Error detection and correction and parity bit provided. Separate high drive external address & data busses. 10MHz data rate at 40MHz CPU clock System support functions included: Arbitrator for use in tightly coupled multiprocessor design. Bus control provide