PLL601-02
PLL601-02 is Low Phase Noise PLL Clock Multiplier manufactured by PhaseLink.
Features
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Full swing CMOS outputs with 25 mA drive capability at TTL levels. Reference 10-27MHz crystal or clock. Integrated crystal load capacitor: no external load capacitor required. Output clocks up to 160MHz at 3.3V. Low phase noise (-126dBc/Hz @ 1kHz). Output Enable function. Low jitter (RMS): 6.4ps (period), 9.4ps (accum.) Advanced low power sub-micron CMOS process. 3.3V operation. Available in 16-Pin SOIC or TSSOP.
.D at h S a t e e
4U
. m o c
Preliminary
Low Phase Noise PLL Clock Multiplier
PIN CONFIGURATION
CLK REFEN VDD VDD VDD XOUT S1 XIN
1 2
16 15
GND GND GND REFOUT OE S0 S3
PLL 601-02
3 4 5 6 7
14 13 12 11 10...
