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HYI18T1G160B Datasheet - Qimonda

HYI18T1G160B, 1-Gbit Double-Data-Rate-Two SDRAM

latched at the cross point of differential clocks (CK rising and CK falling). All I/Os are synchronized with a single ended DQS or differential DQS-DQS pair in a source synchronous fashion. A 17-bit address bus for ×4 and ×8 organised components and a 16 bit address bus for ×16 components is used to.

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Datasheet Details

Part number:

HYI18T1G160B

Manufacturer:

Qimonda

File Size:

4.06 MB

Description:

1-Gbit Double-Data-Rate-Two SDRAM

HYI18T1G160B Features

* The 1-Gbit Double-data-Rate SDRAM offers the following key features:

* Off-Chip-Driver impedance adjustment (OCD) and On

* 1.8 V ± 0.1 V Power Supply 1.8 V ± 0.1 V (SSTL_18) compatible I/O Die-Termination (ODT) for better signal quality

* DRAM organizations with 4, 8 and 16 d

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