853S057 Datasheet - Renesas

LVPECL/ECL Clock Data Multiplexer

853S057 Features

* High speed 4:1 differential multiplexer

* One differential 3.3V, 2.5V LVPECL/ECL output

* Four differential CLKx, nCLKx input pairs

* Differential CLKx, nCLKx pairs can accept the following interface levels: LVPECL, LVDS, CML, SSTL

* Maximum input/output fre

853S057 General Description

The 853S057 is a 4:1 Differential-to-3.3V or 2.5V LVPECL/ECL Clock/Data Multiplexer which can operate up to 3GHz. The 853S057 has 4 differential selectable clock input pairs. The CLK, nCLK input pairs can accept LVPECL, LVDS, CML or SSTL levels. The fully differential architecture and low propagatio.

853S057 Datasheet (691.45 KB)