Part 9DML0441
Description 2:4 3.3V PCIe Gen1-5 Clock Mux
Manufacturer Renesas
Size 628.57 KB
Renesas
9DML0441

Overview

The 9DML0441 and 9DML0451 devices are 3.3V members of Renesas' Full-Featured PCIe family. They support PCIe Gen1-6 Common Clocked (CC), Separate Reference no Spread (SRnS), and Independent Reference (IR) clock architectures.

  • Four 1-200MHz Low-Power HCSL (LP-HCSL) DIF pairs
  • 9DML0441 default ZOUT = 100
  • 9DML0451 default ZOUT = 85
  • See AN-891 for easy termination to other logic levels Features
  • Direct connection to 100 (xx41) or 85 (xx51) transmission lines saves up to 16 resistors
  • 79mW typical power consumption
  • Spread Spectrum Clocking (SSC) compatible
  • OE# pins for each output
  • HCSL-compatible differential inputs
  • Selectable asynchronous or glitch-free, gapped-clock switching; allows the mux to be selected at power up even if both inputs are not running, then transition to glitch-free switching mode