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HD74HC166 - Parallel-load 8-bit Shift Register

Description

This device is an 8-bit shift register with an output from the last stage.

Data may be loaded into the register either in parallel or in serial form.

When the Shift/Load input is low, the data is loaded asynchronously in parallel.

Features

  • High Speed Operation: tpd (Clock to QH) = 14 ns typ (CL = 50 pF).
  • High Output Current: Fanout of 10 LSTTL Loads.
  • Wide Operating Voltage: VCC = 2 to 6 V.
  • Low Input Current: 1 µA max.
  • Low Quiescent Supply Current: ICC (static) = 4 µA max (Ta = 25°C).
  • Ordering Information Part Name Package Type Package Code (Previous Code) Package.

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Datasheet preview – HD74HC166

Datasheet Details

Part number HD74HC166
Manufacturer Renesas
File Size 189.38 KB
Description Parallel-load 8-bit Shift Register
Datasheet download datasheet HD74HC166 Datasheet
Additional preview pages of the HD74HC166 datasheet.

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Full PDF Text Transcription

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HD74HC166 Parallel-load 8-bit Shift Register REJ03D0582-0300 Rev.3.00 Jan 31, 2006 Description This device is an 8-bit shift register with an output from the last stage. Data may be loaded into the register either in parallel or in serial form. When the Shift/Load input is low, the data is loaded asynchronously in parallel. When the Shift/Load input is high, the data is loaded serially on the rising edge of either clock inhibit or Clock. Clear is asynchronous and active-low. The 2-input NOR clock may be used either by combining two independent clock sources or by designating one of the clock inputs to act as a clock inhibit.
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