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HD74HC173 - 4-bit D-type Register

Description

The four D type Flip-Flops operate synchronously from a common clock.

The 3-state outputs allow the device to be used in bus organized systems.

The outputs are placed in the 3-stage mode when either of the output disable pins are in the logic high level.

Features

  • High Speed Operation: tpd (Clock to Q) = 14 ns typ (CL = 50 pF).
  • High Output Current: Fanout of 10 LSTTL Loads.
  • Wide Operating Voltage: VCC = 2 to 6 V.
  • Low Input Current: 1 µA max.
  • Low Quiescent Supp.

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Datasheet preview – HD74HC173

Datasheet Details

Part number HD74HC173
Manufacturer Renesas
File Size 227.28 KB
Description 4-bit D-type Register
Datasheet download datasheet HD74HC173 Datasheet
Additional preview pages of the HD74HC173 datasheet.

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Full PDF Text Transcription

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HD74HC173 4-bit D-type Register (with 3-state outputs) REJ03D0583-0300 Rev.3.00 Jan 31, 2006 Description The four D type Flip-Flops operate synchronously from a common clock. The 3-state outputs allow the device to be used in bus organized systems. The outputs are placed in the 3-stage mode when either of the output disable pins are in the logic high level. The input disable allows the flip-flops to remain in their present states without having to disrupt the clock. If either of the 2 input disables are taken to a logic high level, the Q outputs are fed back to the inputs, forcing the flip-flops to remain in the same state. Clearing is enabled by taking the clear input to a logic high level. The data outputs change state on the positive going edge of the clock.
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