HD74LS166AP
HD74LS166AP is 8-bit Shift Register manufactured by Renesas.
- Part of the HD74LS166A comparator family.
- Part of the HD74LS166A comparator family.
features gated clock inputs and an overriding clear input.
The parallel-in or serial-in modes are established by the shift / load input.
When high, this input enables the serial data input and couples the eight flip-flops for serial shifting with each clock pulse. When low, the parallel (broadside) data inputs are enabled and synchronous loading occurs on the next clock pulse, during parallel loading, serial data flow is inhibited.
This, of course, allows the system clock to be free running and the register can be stopped on mand with the other clock input. The clock-inhibit input should be changed to the high level only while the clock input is high. A buffered, direct clear input overrides all other inputs, including the clock, and sets all flip-flops to zero.
Features
- Ordering Information
Part Name HD74LS166AP
Package Type DILP-16 pin
Package Code (Previous Code)
PRDP0016AE-B (DP-16FV)
Package Abbreviation
Taping Abbreviation (Quantity)
- Pin Arrangement
Serial Input
A2
B3 Parallel
Inputs C 4
D5
Clock Inhibit
Clock 7
GND 8
16 VCC
15 Shift/ Load
14 Parallel Input H
13 Output QH
12 G 11 F 10 E
Parallel Inputs
9 Clear
(Top view)
Rev.4.00, May 10, 2006, page 1 of 7
HD74LS166A
Function Table
Clear
Shift Load
Inputs
Clock...
