HD74LV573A Datasheet | Renesas

Octal D-type Transparent Latches with 3-state Outputs Description REJ03D0519- 0100 Rev.1.00 Feb. 01, 2005 The HD74LV573A has eight D type latches with three state outputs in a 20 pin package. When the latch enables input is high, the Q outputs will follow the D inputs. When the latch enables goes low, data at the D inputs will be retained at the outputs until latch enable returns high again. When a high logic level is applied to the output control input, all outputs go to a high impedance state, regardless of what signals are present at the other inputs and the state of the storage elements. Low-voltage and high-speed operation is suitable for the battery-powered products (e.g., notebook puters), and the low-power consumption extends the battery life. Features - VCC = 2.0 V to 5.5 V operation - All inputs VIH (Max.) = 5.5 V (@VCC = 0 V to 5.5 V) - All outputs VO (Max.) = 5.5 V (@VCC = 0 V) - Typical VOL ground bounce < 0.8 V (@VCC = 3.3 V, Ta = 25°C) -...