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latch enable (LE) and output enable (OE) inputs. When LE is HIGH, data at the inputs enter the latches. In this condition the latches are transparent,...
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evels of the D inputs.
A buffered output-enable (OE) input can be used to place the eight outputs in either a normal logic state (high or low) or the ...
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● Internal Ethernet MAC layer and PHY layer ● Realize bidirectional transparent transmission between serial data and network data ● Support 10/100M, f...
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s Choice of 8 latches or 8 D-type flip-flops in a single package s 3-STATE bus-driving outputs s Full parallel-access for loading s Buffered control i...
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3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. The high-impedance 3-state and increased high-l...
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allow the use of these devices as translators in mixed 3.3 V and 5 V applications.
The 74LVC373A is functionally identical to the 74LVC573A, but has a...
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• IDT54/74FCT373/533/573 equivalent to FAST™ speed and drive • IDT54/74FCT373A/533A/573A up to 30% faster than FAST • Equivalent to FAST output drive ...
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• IDT54/74FCT373/533/573 equivalent to FAST™ speed and drive • IDT54/74FCT373A/533A/573A up to 30% faster than FAST • Equivalent to FAST output drive ...
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nal bus drivers, and working registers. These devices can be used as two 8-bit latches or one 16-bit latch. The Q outputs of the latches follow the da...
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N VOUT IIN IOUT ICC PD Tstg TL
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Parameter DC Supply Voltage (Referenced to GND) DC Input Voltage (Referenced to GND) DC Output Voltage (Referenced t...
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