ICS601-21 Datasheet - Renesas

LOW PHASE NOISE CLOCK MULTIPLIER

ICS601-21 Features

* Fully integrated PLL, no external loop filter required

* Differential 3.3 V LVPECL outputs

* Uses fundamental crystal or clock

* Crystal input frequency: 10 to 27MHz

* Clock input: 10 to 38MHz (mulitply by 6) 10 to 31MHz (all other multiply settings)

ICS601-21 General Description

The ICS601-21 is a low-cost, low phase noise, high performance clock synthesizer for applications which require low phase noise and low jitter. It is IDT’s lowest phase noise multiplier. Using IDT’s patented analog and digital Phase Locked Loop (PLL) techniques, the chip accepts a crystal or clock i.

ICS601-21 Datasheet (268.35 KB)