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R1Q6A7218ABG - 72-Mbit DDRII SRAM Separate I/O 2-word Burst RAM

Download the R1Q6A7218ABG datasheet PDF. This datasheet also covers the R1Q6A7236ABG variant, as both devices belong to the same 72-mbit ddrii sram separate i/o 2-word burst ram family and are provided as variant models within a single manufacturer datasheet.

General Description

The R1Q6A7236 is a 2,097,152-word by 36-bit and the R1Q6A7218 is a 4,194,304-word by 18-bit synchronous double data rate static RAM fabricated with advanced CMOS technology using full CMOS six-transistor memory cell.

It integrates unique synchronous peripheral circuitry and a burst counter.

Key Features

  • ႑ Power Supply.
  • 1.8 V for core (VDD), 1.4 V to VDD for I/O (VDDQ) ႑ Clock.
  • Fast clock cycle time for high bandwidth.
  • Two input clocks (K and /K) for precise DDR timing at clock rising edges only.
  • Two input clocks for output data (C and /C) to minimize clock skew and flight time mismatches.
  • Two output echo clocks (CQ and /CQ) simplify data capture in high-speed systems.
  • Clock-stop capability with μs restart ႑ I/O.
  • Separate independent.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (R1Q6A7236ABG-Renesas.pdf) that lists specifications for multiple related part numbers.

Datasheet Details

Part number R1Q6A7218ABG
Manufacturer Renesas
File Size 796.15 KB
Description 72-Mbit DDRII SRAM Separate I/O 2-word Burst RAM
Datasheet download datasheet R1Q6A7218ABG Datasheet

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
R1Q6A7236ABG / R1Q6A7218ABG Series R1Q6A7236ABG R1Q6A7218ABG 72-Mbit DDRII SRAM Separate I/O 2-word Burst R10DS0179EJ0011 Rev. 0.11 2013.01.15 Description The R1Q6A7236 is a 2,097,152-word by 36-bit and the R1Q6A7218 is a 4,194,304-word by 18-bit synchronous double data rate static RAM fabricated with advanced CMOS technology using full CMOS six-transistor memory cell. It integrates unique synchronous peripheral circuitry and a burst counter. All input registers are controlled by an input clock pair (K and /K) and are latched on the positive edge of K and /K. These products are suitable for applications which require synchronous operation, high speed, low voltage, high density and wide bit configuration. These products are packaged in 165-pin plastic FBGA package.