R5F117GC Description
RL78/I1D RENESAS MCU 1. OUTLINE.
R5F117GC Key Features
- VDD = 1.6 V to 3.6 V
- HALT mode
- STOP mode
- SNOOZE mode
- CISC architecture with 3-stage pipeline
- Minimum instruction execution time: Can be changed
- Multiply/divide/multiply & accumulate instructions are supported
- Address space: 1 MB
- General-purpose registers: (8-bit register × 8) × 4 banks
- On-chip RAM: 0.7 to 3 KB