Description
RL78/I1D RENESAS MCU 1.OUTLINE 1.1 .
Features
* Ultra-low power consumption technology
* VDD = 1.6 V to 3.6 V
* HALT mode
* STOP mode
* SNOOZE mode
RL78 CPU core
* CISC architecture with 3-stage pipeline
* Minimum instruction execution time: Can be changed
from high speed (0.04167 μs: @ 24 MHz opera
Applications
* Power management and reset function
* On-chip power-on-reset (POR) circuit
* On-chip voltage detector (LVD) (Select interrupt and
reset from 12 levels)
R01DS0244EJ0220 Rev. 2.20 Feb 20, 2017
Datasheet
R01DS0244EJ0220 Rev. 2.20
Feb 20, 2017
Data transfer controller (DTC)
* T
