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R5F523T3AGFM - MCU

Download the R5F523T3AGFM datasheet PDF. This datasheet also covers the R5F523T5ADFL variant, as both devices belong to the same mcu family and are provided as variant models within a single manufacturer datasheet.

Description

CPU CPU Maximum operating frequency: 40 MHz 32-bit RX CPU (RX v2) Minimum instruction execution time: One instruction per clock cycle Address space: 4-Gbyte linear Register set General purpose: Sixteen 32-bit registers Control: Ten 32-bit registers Accumulator: Two 7

Features

  • 32-bit RX CPU core.
  • Max. operating frequency: 40 MHz Capable of 65.6 DMIPS in operation at 40 MHz.
  • Enhanced DSP: 32-bit multiply-accumulate and 16-bit multiply-subtract instructions supported.
  • Built-in FPU: 32-bit single-precision floating point (compliant to IEEE754).
  • Divider (fastest instruction execution takes two CPU clock cycles).
  • Fast interrupt.
  • CISC Harvard architecture with 5-stage pipeline.
  • Variable-length instructions, ultra-compact code.
  • O.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (R5F523T5ADFL-Renesas.pdf) that lists specifications for multiple related part numbers.

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Other Datasheets by Renesas

Part Number Description
R5F523T3AGFD MCU
R5F523T3AGFL MCU
R5F523T3ADFD MCU
R5F523T3ADFL MCU
R5F523T3ADFM MCU

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
Datasheet RX23T Group Renesas MCUs R01DS0248EJ0110 Rev.1.10 Jan 13, 2016 40-MHz 32-bit RX MCUs, built-in FPU, 65.6 DMIPS, 12-bit ADC (equipped with three S/H circuits, double data registers, and comparator) 40MHz PWM (three-phase complementary output × 2ch) Features ■ 32-bit RX CPU core  Max. operating frequency: 40 MHz Capable of 65.
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