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STP40N03L-20 Datasheet

N - CHANNEL ENHANCEMENT MODE ULTRA HIGH DENSITY POWER MOS TRANSISTOR

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STP40N03L-20
N - CHANNEL ENHANCEMENT MODE
”ULTRA HIGH DENSITY” POWER MOS TRANSISTOR
TYPE
ST P40N03L-20
VDSS
30 V
RDS(on)
< 0.02
ID
40 A
PRELIMINARY DATA
s TYPICAL RDS(on) = 0.016
s AVALANCHE RUGGED TECHNOLOGY
s 100% AVALANCHE TESTED
s HIGH CURRENT CAPABILITY
s 175oC OPERATING TEMPERATURE
s HIGH dV/dt CAPABILITY
s APPLICATION ORIENTED
CHARACTERIZATION
APPLICATIONS
s HIGH CURRENT, HIGH SPEED SWITCHING
s POWER MOTOR CONTROL
s DC-DC & DC-AC CONVERTERS
s SYNCRONOUS RECTIFICATION
3
2
1
TO-220
INTERNAL SCHEMATIC DIAGRAM
ABSOLUTE MAXIMUM RATINGS
Symbol
P ar ame t er
VDS
V D GR
V GS
ID
ID
IDM()
Pto t
Drain-source Voltage (VGS = 0)
Drain- gate Voltage (RGS = 20 k)
Gate-source Voltage
Drain Current (continuous) at Tc = 25 oC
Drain Current (continuous) at Tc = 100 oC
Drain Current (pulsed)
Total Dissipat ion at Tc = 25 oC
Derating Factor
dV/dt(1) Peak Diode Recovery voltage slope
Tst g St orage Temperature
Tj Max. Operating Junction Temperature
() Pulse width limited by safe operating area
March 1996
Value
30
30
± 15
40
28
160
90
0 .6
6
-65 to 175
175
Unit
V
V
V
A
A
A
W
W/oC
V/ns
oC
oC
1/7


STMicroelectronics Electronic Components Datasheet

STP40N03L-20 Datasheet

N - CHANNEL ENHANCEMENT MODE ULTRA HIGH DENSITY POWER MOS TRANSISTOR

No Preview Available !

STP40N03L-20
THERMAL DATA
Rt hj-ca se
Rt hj- amb
Rthc- si nk
Tl
Thermal Resistance Junction-case
Thermal Resistance Junction-ambient
Thermal Resistance Case-sink
Maximum Lead T emperature For Soldering Purpose
Max
Max
Typ
1.66
62.5
0.5
300
oC/W
oC/W
oC/W
oC
AVALANCHE CHARACTERISTICS
Symb ol
IAR
E AS
EAR
IAR
Parameter
Avalanche Current, Repetitive or Not-Repetitive
(pulse width limited by Tj max, δ < 1%)
Single Pulse Avalanche Energy
(starting Tj = 25 oC, ID = IAR, VDD = 25 V)
Repetitive Avalanche Energy
(pulse width limited by Tj max, δ < 1%)
Avalanche Current, Repetitive or Not-Repetitive
(Tc = 100 oC, pulse width limited by Tj max, δ < 1%)
Max Value
40
300
75
28
Unit
A
mJ
mJ
A
ELECTRICAL CHARACTERISTICS (Tcase = 25 oC unless otherwise specified)
OFF
Symb ol
V(BR)DSS
IDSS
IGSS
P a ram et er
Test Conditions
Dr ain - s o ur c e
Breakdown Voltage
ID = 250 µA VGS = 0
Zero Gate Voltage
VDS = Max Rating
Drain Current (VGS = 0) VDS = Max Rating x 0. 8 Tc = 125 oC
Gate-body Leakage
Current (VDS = 0)
VGS = ± 15 V
Min.
30
Typ . Max.
250
1000
± 100
Unit
V
µA
µA
nA
ON ()
Symb ol
V GS(th )
RDS( o n )
ID(o n)
P a ram et er
Test Conditions
Gate T hreshold Voltage VDS = VGS ID = 250 µA
St atic Drain-source On VGS = 10V ID = 20 A
Re s is ta nc e
VGS = 10V ID = 20 A
VGS = 5V ID = 20 A
Tc = 100oC
On State Drain Current VDS > ID(on) x RDS(on)max
VGS = 10 V
Min.
1
40
Typ .
1.6
0.016
0.019
M a x.
2
0.02
0.04
0. 023
Unit
V
A
DYNAMIC
Symb ol
gfs ()
Ciss
Coss
Crss
P a ram et er
Forward
T r ans c on duc ta nc e
Input Capacitance
Output Capacitance
Reverse Transfer
Capacitance
Test Conditions
VDS > ID(on) x RDS(on)max ID = 20 A
Min.
15
Typ .
22
M a x.
Unit
S
VDS = 25 V f = 1 MHz VGS = 0
1800
450
180
2300
580
230
pF
pF
pF
2/7


Part Number STP40N03L-20
Description N - CHANNEL ENHANCEMENT MODE ULTRA HIGH DENSITY POWER MOS TRANSISTOR
Maker ST Microelectronics
Total Page 7 Pages
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