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S T M6920A
S amHop Microelectronics C orp. Apr,08.2005
Dual N-C hannel E nhancement Mode Field E ffect Transistor
P R ODUC T S UMMAR Y
V DS S
www.DataSheet4U.com 40V
F E AT UR E S
( m W ) Max
ID
5A
R DS (ON)
S uper high dense cell design for low R DS (ON ).
35 @ V G S = 10V 62 @ V G S = 4.5V
R ugged and reliable. S urface Mount P ackage.
D1
8
D1
7
D2
6
D2
5
S O-8 1
1 2 3 4
S1
G1 S 2
G2
ABS OLUTE MAXIMUM R ATINGS (T A=25 C unless otherwise noted)
P arameter Drain-S ource Voltage Gate-S ource Voltage Drain C urrent-C ontinuous @ Ta -P ulsed
b a
S ymbol V DS V GS 25 C 70 C ID IDM IS PD T J , T S TG
Limit 40 20 5 4.2 20 1.7 2 1.
STM6920A Datasheet
