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K7A803609A Datasheet 256Kx36 & 512Kx18 Synchronous SRAM

Manufacturer: Samsung Semiconductor

Download the K7A803609A datasheet PDF. This datasheet also includes the K7A801809A variant, as both parts are published together in a single manufacturer document.

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Note: The manufacturer provides a single datasheet file (K7A801809A_Samsungsemiconductor.pdf) that lists specifications for multiple related part numbers.

General Description

The K7A803609A and K7A801809A are 9,437,184-bit Synchronous Static Random Access Memory designed for high performance second level cache of Pentium and Power PC based System.

It is organized as 256K(512K) words of 36(18) bits and integrates address and control registers, a 2-bit burst address counter and added some new functions for

Overview

K7A803609A K7A801809A Document Title 256Kx36 & 512Kx18 Synchronous SRAM 256Kx36 & 512Kx18-Bit Synchronous Pipelined Burst SRAM Revision History Rev.

No.

0.0 1.0 History Initial draft 1.

Key Features

  • Synchronous Operation.
  • 2 Stage Pipelined operation with 4 Burst.
  • On-Chip Address Counter.
  • Self-Timed Write Cycle.
  • On-Chip Address and Control Registers.
  • 3.3V+0.165V/-0.165V Power Supply.
  • I/O Supply Voltage 3.3V+0.165V/-0.165V for 3.3V I/O or 2.5V+0.4V/-0.125V for 2.5V I/O.
  • 5V Tolerant Inputs Except I/O Pins.
  • Byte Writable Function.
  • Global Write Enable Controls a full bus-width write.
  • Powe.