MR18R162GDF0 Datasheet | Samsung Semiconductor

MR16R1622(4/8/G)DF0 MR18R1622(4/8/G)DF0 Change History Version 1.0 (July 2002) - First copy. - Based on the 1.4 ver. (July 2002) 256/288Mbit A-die RIMM Module Datasheet Page 0 Version 1.0 July 2002 MR16R1622(4/8/G)DF0 MR18R1622(4/8/G)DF0 (16Mx16)- 2(4/8/16)pcs RIMM Module based on 256Mb D-die, 32s banks,16K/32ms Ref, 2.5V (16Mx18)- 2(4/8/16)pcs RIMM Module based on 288Mb D-die, 32s banks,16K/32ms Ref, 2.5V Overview The RIMM module is a general purpose high- performance memory module suitable for use in a broad range of applications including puter memory, personal puters, workstations and other applications where high bandwidth and low latency are required. The RIMM module consists of 256/288Mb devices. These are extremely high-speed CMOS DRAMs organized as 16M words by 16 or 18 bits. The use of Rambus Signaling Level (RSL) technology permits up to 1066 MHz transfer rates while using conventional system and board design technologies. RDRAM devices are capable of sustained data transfers at 0.94 ns per two bytes (7.5ns per 16 bytes). The RDRAM architecture enables the highest sustained bandwidth for multiple, simultaneous, randomly addressed, memory transactions. The separate control and data buses with independent row and column control yield over 95% bus efficiency. The RDRAM device's 32-bank architecture supports up to four simultaneous transactions per device. RDRAM Key Timing Parameters/Part Numbers The following table lists the frequency and latency bins available for RIMM modules. Table 1: Part Number by Freq. & Latency Speed Organization Bin t RAC I/O (Row Freq. Access (MHz) Time) ns 1066 1066 1066 800 800 1066 1066 1066 800 800 1066 1066 1066 800 800 1066 1066 1066 800 800 32P 32 35 40 45 32P 32 35 40 45 32P 32 35 40 45 32P 32 35 40 45 Part Number -CT9 -CN9 32M x 16/18 -CM9 -CM8 -CK8 -CT9 -CN9 64M x 16/18 -CM9 -CM8 -CK8 -CT9 -CN9 128M x 16/18 -CM9 -CM8 -CK8 -CT9 -CN9 256M x 16/18 -CM9 -CM8 -CK8 MR16/18R1622DF0-CT9 MR16/18R1622DF0-CN9...