p-channel vertical dmos fets.
* Low threshold
* High input impedance
* Low input capacitance
* Fast switching speeds
* Free from secondary breakdown
* Low input and output leak.
* Logic level interfaces
* Solid state relays
* Linear amplifiers
* Power management
* Analog switche.
This low threshold enhancement-mode (normally-off) transistor utilizes a vertical DMOS structure and Supertex’s well-proven silicon-gate manufacturing process. This combination produces a device with the power handling capabilities of bipolar transis.
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