WCMS0808U1X Datasheet | Weida Semiconductor

S0808U1X 32K x 8 Static RAM Features - Low voltage range: - 2.7V - 3.6V - Low active power and standby power - Easy memory expansion with CE and OE Features - TTL-patible inputs and outputs - Automatic power-down when deselected - CMOS for optimum speed/power reducing the power consumption by over 99% when deselected. The WCMS0808U1X is available in the 450-mil-wide (300-mil body width) narrow SOIC and TSOP. An active LOW write enable signal (WE) controls the writing/reading operation of the memory. When CE and WE inputs are both LOW, data on the eight data input/output pins (I/O0 through I/O7) is written into the memory location addressed by the address present on the address pins (A0 through A14). Reading the device is acplished by selecting the device and enabling the outputs, CE and OE active LOW, while WE remains inactive or HIGH. Under these conditions, the contents of the location addressed by the information on address pins are present on the eight data input/output pins. The input/output pins remain in a high-impedance state unless the chip is selected, outputs are enabled, and write enable (WE) is HIGH. Functional Description The WCMS0808U1X is posed of a high-performance CMOS static RAM organized as 32K words by 8 bits. Easy memory expansion is provided by an active LOW chip enable (CE) and active LOW output enable (OE) and three-state drivers. These devices have an automatic power-down feature, Logic Block Diagram Pin Configurations Narrow SOIC Top View A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 I/O0 I/O1 I/O2 GND 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 VCC WE A4 A3 A2 A1 OE A0 CE I/O7 I/O6 I/O5 I/O4 I/O3 INPUTBUFFER A10 A9 A8 A7 A6 A5 .. A4 A3 A2 CE WE OE A 14 A 13 A 12 A 11 A1 A0 ROW DECODER I/O0 I/O1 SENSE AMPS I/O2 I/O3 I/O4 I/O5 512x512 ARRA Y COLUMN DECODER POWER DOWN I/O6 I/O7 OE A1 A2 A3 A4 WE VCC A5 A6 A7 A8 A9 A10 A11 22 23 24 25 26 27 28 1 2 3 4 5 6 7 21 20 19 18 17...