asynchronous sram.
DESCRIPTION
n n
512Kx24 bit CMOS Static Random Access Memory Array
* Fast Access Times: 10, 12, and 15ns
* Master Output Enable and Write Control
* Three Ch.
n n
512Kx24 bit CMOS Static Random Access Memory Array
* Fast Access Times: 10, 12, and 15ns
* Master Output Enable and Write Control
* Three Chip Enables for Byte Control
* TTL Compatible Inputs and Outputs
* Fully Static, No C.
Image gallery
TAGS
Manufacturer
Related datasheet