XC2S30 Description
DS001-2 (v2.9) March 12, 2021 Architectural Description - Spartan-II Array - Input/Output Block - Configurable Logic Block - Block RAM - Clock Distribution: Delay-Locked Loop - Boundary Scan Development System Configuration - Configuration Timing Design Considerations Module 3: DC and Switching Characteristics DS001-3 (v2.9) March 12, 2021 DC Specifications - Ratings - Remended Operating Conditions - DC...
XC2S30 Key Features
- General Overview
- Product Availability
- User I/O Chart
- Ordering Information
- Architectural Description
- Spartan-II Array
- Input/Output Block
- Configurable Logic Block
- Block RAM
- Clock Distribution: Delay-Locked Loop