74SSTUB32865A
Description
This 28-bit 1:2 configurable registered buffer is designed for 1.7-V to 1.9-V VCC operation.
Key Features
- 2 Member of the Texas Instruments Widebus+™ Family
- Pinout Optimizes DDR2 RDIMM PCB Layout
- 1-to-2 Outputs Supports Stacked DDR2
- High driver strength for heavily loaded DIMMs
- Chip-Select Inputs Gate the Data Outputs from
- Output Edge-Control Circuitry Minimizes Switching Noise in an Unterminated Line
- Supports SSTL_18 Data Inputs
- Differential Clock (CK and CK) Inputs
- Supports LVCMOS Switching Levels on the
- Checks Parity on DIMM-Independent Data Inputs
