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74SSTUB32866A - 25-Bit Configurable Registered Buffer

General Description

This 25-bit 1:1 or 14-bit 1:2 configurable registered buffer is designed for 1.7-V to 1.9-V VCC operation.

In the 1:1 pinout configuration, only one device per DIMM is required to drive nine SDRAM loads.

In the 1:2 pinout configuration, two devices per DIMM are required to drive 18 SDRAM loads.

Key Features

  • 1.
  • 2 Member of the Texas Instruments Widebus+™ Family.
  • Pinout Optimizes DDR2 DIMM PCB Layout.
  • Configurable as 25-Bit 1:1 or 14-Bit 1:2 Registered Buffer.
  • Chip-Select Inputs Gate the Data Outputs from Changing State and Minimizes System Power Consumption.
  • Output Edge-Control Circuitry Minimizes Switching Noise in an Unterminated Line.
  • Supports SSTL_18 Data Inputs.
  • Differential Clock (CLK and CLK) Inputs.
  • Supports LVCMOS Switc.

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