ADS6425 Description
The ADS6425 is a high performance 12-bit, 125-MSPS quad channel ADC. Serial LVDS data outputs reduce the number of interface lines, resulting in a pact 64-pin QFN package (9 mm × 9 mm) that allows for high system integration density. The device includes a 3.5 dB coarse gain option that can be used to improve SFDR performance with little degradation in SNR.
ADS6425 Key Features
- Maximum Sample Rate: 125 MSPS
- 12-Bit Resolution with No Missing Codes
- 1.65-W Total Power
- Simultaneous Sample and Hold
- 70.3 dBFS SNR at Fin = 50 MHz
- 83 dBc SFDR at Fin = 50 MHz, 0 dB Gain
- 79 dBc SFDR at Fin = 170 MHz, 3.5 dB Gain
- 3.5 dB Coarse Gain and up to 6 dB
- Serialized LVDS Outputs with Programmable Internal Termination Option
- Supports Sine, LVCMOS, LVPECL, LVDS Clock Inputs and Amplitude Down to 400 mVpp Differential