CD54ACT273 Datasheet | Texas Instruments

Data sheet acquired from Harris Semiconductor SCHS249B August 1998 - Revised July 2002 CD54AC273, CD74AC273 CD54ACT273, CD74ACT273 Octal D Flip-Flop with Reset Features - Buffered Inputs - Typical Propagation Delay - 6.5ns at VCC = 5V, TA = 25o C, CL = 50p F - Exceeds 2k V ESD Protection MIL-STD-883, Method 3015 - SCR-Latchup-Resistant CMOS Process and Circuit Design - Speed of Bipolar FAST™/AS/S with Significantly Reduced Power Consumption - Balanced Propagation Delays - AC Types Feature 1.5V to 5.5V Operation and Balanced Noise Immunity at 30% of the Supply - ±24m A Output Drive Current - Fanout to 15 FAST™ ICs - Drives 50Ω Transmission Lines Pinout CD54AC273, CD54ACT273 (CDIP) CD74AC273, CD74ACT273 (PDIP, SOIC) TOP VIEW MR 1 Q0 2 D0 3 D1 4 Q1 5 Q2 6 D2 7 D3 8 Q3 9 GND 10 20 VCC 19 Q7 18 D7 17 D6 16 Q6 15 Q5 14 D5 13 D4 12 Q4 11 CP Description The ’AC273 and ’ACT273 devices are octal D-type flip-flops with reset that utilize advanced CMOS logic technology. Information at the D input is transferred to the Q output on the positive-going edge of the clock pulse. All eight flip-flops are controlled by a mon clock (CP) and a mon reset (MR). Resetting is acplished by a low voltage level independent of the clock. Ordering Information PART NUMBER CD74AC273E CD54AC273F3A CD74ACT273E CD54ACT273F3A CD74AC273M CD74ACT273M TEMPERATURE...