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CDC536 Datasheet 3.3-v Phase-lock-loop Clock Driver

Manufacturer: Texas Instruments

Overview: CDC536 www.ti.com SCAS378G – APRIL 1994 – REVISED JULY 2004 3.

General Description

The CDC536 is a high-performance, low-skew, low-jitter clock driver.

It uses a phase-lock loop (PLL) to precisely align, in both frequency and phase, the clock output signals to the clock input (CLKIN) signal.

It is specifically designed for use with synchronous DRAMs and popular microprocessors operating at speeds from 50 MHz to 100 MHz or down to 25 MHz on outputs configured as half-frequency outputs.

Key Features

  • Low-Output Skew for Clock-Distribution and Clock-Generation.

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