* 1 High Performance LVPECL and LVCMOS PLL Clock Synchronizer
* Two Reference Clock Inputs (Primary and Secondary Clock) for Redundancy Support With Manual or Automatic Selection
* Accepts LVCMOS Input Frequencies Up to 200 MHz
* VCXO_IN Clock is Synchronized to One of
CDCM7005-SP Datasheet (1.84 MB)
CDCM7005-SP
1.84 MB
Clock synchronizer and jitter cleaner.
Product Folder Sample & Buy Technical Documents Tools & Software Support & Community CDCM7005-SP SGLS390G JULY 2009 REVISED N.
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