Datasheet Summary
CDCV857A 2.5-V PHASE LOCK LOOP CLOCK DRIVER
D Phase-Lock Loop Clock Driver for Double
Data-Rate Synchronous DRAM
Applications
D Spread Spectrum Clock patible D Operating Frequency: 60 to 180 MHz D Low Jitter (cyc- cyc): ±50 ps D Distributes One Differential Clock Input to
Ten Differential Outputs
SCAS667A
- APRIL 2001
- REVISED AUGUST 2002
D Three-State Outputs When the Input
Differential Clocks Are <20 MHz
D Operates From Dual 2.5-V Supplies D Available in a 48-Pin TSSOP Package or
56-Ball MicroStar Junior BGA Package
D Consumes < 200-µA Quiescent Current D External Feedback PIN (FBIN, FBIN) Are
Used to Synchronize the Outputs to the
Input Clocks description
The CDCV857A is a...