DS92LV3241
Description
The DS92LV3241 (SER) serializes a 32-bit data bus into 2 or 4 (selectable) embedded clock LVDS serial channels for a data payload rate up to 2.72 Gbps over cables such as CATx, or backplanes FR-4 traces.
Key Features
- Selectable Serial LVDS Bus Width – Dual Lane Mode (20 to 50 MHz) – Quad Lane Mode (40 to 85 MHz)
- Simplified Clocking Architecture – No Separate Serial Clock Line – No reference Clock Required – Receiver Locks to Random Data
- Integrated LVDS Terminations
- Built-in AT-SPEED BIST for End-to-End
- AC-Coupled Interconnect for Isolation and
- > 4KV HBM ESD Protection
- Space-Saving 64-pin TQFP Package
- Full Industrial Temperature Range : -40° to
Applications
- Industrial Imaging (Machine-Vision) and Control
